4 transistor CMOS image sensors (4TCISs) have been in widespread use since the 1980s. 4TCISs are increasingly employed in mobile devices, where attention is primarily focused on miniaturizing individual pixels. Whilst small pixels are desirable for mobile devices, for many scientific, medical and industrial applications where sensitivity is critical, larger pixels are often required. 4TCIS pixels include a transfer gate, which brings several advantages, such as enabling correlated double sampling to eliminate reset noise. However, the inclusion of a transfer gate can lead to a phenomenon known as image lag, which occurs when the time taken for electrons within a photodiode to move from the point of creation to the transfer gate exceeds the transfer gate pulse width, which defines the period for which the transfer gate is open.
Although image lag often has a severely negative impact on the pixel's utility, the present inventors are not aware of a repeatable and flexible design for a 4TCIS pixel specifically directed towards the reduction or elimination of image lag.
The inventors have appreciated that it would be desirable to provide a 4TCIS pixel which can be scaled up in size without exhibiting significant image lag. Embodiments of the present invention aim to provide such a 4TCIS pixel.